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EP1S25F780I6N

High-performance EP1S25F780I6N FPGA belonging to the Stratix Family, featuring 25660 Cells running at 450

在庫：7,710

  • 90日間のアフター保証
  • 365日の品質保証
  • 正規品保証
  • 7*24時間サービス検疫

迅速な見積もり

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概要 EP1S25F780I6N

EP1S25F780I6N represents a state-of-the-art FPGA solution tailored for demanding applications in sectors such as telecommunications, automotive, and industrial automation. By harnessing the power of field-programmable gate arrays, users can achieve unparalleled flexibility in customizing the behavior of electronic systems. The 780-pin package ensures secure and reliable connections with external devices and circuitry, enabling seamless integration within larger system architectures. The I6N speed grade and commercial temperature range further emphasize the suitability of this FPGA for mission-critical operations requiring optimal performance and stability

主な特長

  • Configuration devices for SRAM-based LUT devices offer the following
  • features:
  • Configures Altera ACEX 1K, APEX 20K (including APEX 20K, APEX 20KC, and APEX 20KE), APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K (including FLEX 10KE and FLEX 10KA) Mercury, Stratix, Stratix GX, Stratix II, and Stratix II GX devices
  • Easy-to-use four-pin interface
  • Low current during configuration and near-zero standby mode current
  • Programming support with the Altera Programming Unit (APU) and programming hardware from Data I/O, BP Microsystems, and other third-party programmers
  • Available in compact plastic packages
  • 8-pin plastic dual in-line (PDIP) package
  • 20-pin plastic J-lead chip carrier (PLCC) package
  • 32-pin plastic thin quad flat pack (TQFP) package
  • EPC2 device has reprogrammable flash configuration memory
  • 5.0-V and 3.3-V in-system programmability (ISP) through the built-in IEEE Std.
  • 1149.1 JTAG interface
  • Built-in JTAG boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1
  • Supports programming through Serial Vector Format File (.svf), Jam Standard Test and Programming Language (STAPL) Format File (.jam), JAM Byte Code File (.jbc), and the Quartus II and MAX+PLUS II softwares using the USB-Blaster, MasterBlaster, ByteBlaster II, EthernetBlaster, or ByteBlasterMV download cable
  • Supports programming through Programmer Object File (.pof) for EPC1 and EPC1441 devices
  • nINIT_CONF pin allows INIT_CONF JTAG instruction to begin FPGA configuration

仕様

以下は、選択された部品の特性やカテゴリーに関する基本的なパラメータである。

Product Category FPGA - Field Programmable Gate Array Shipping Restrictions This product may require additional documentation to export from the United States.
RoHS Details Series Stratix EP1S25
Number of Logic Elements 25660 LE Embedded Memory 1.85 Mbit
Number of I/Os 597 I/O Supply Voltage - Min 1.5 V
Supply Voltage - Max 1.5 V Minimum Operating Temperature - 40 C
Maximum Operating Temperature + 85 C Mounting Style SMD/SMT
Package / Case FBGA-780 Brand Intel / Altera
Maximum Operating Frequency 100 MHz Moisture Sensitive Yes
Number of Logic Array Blocks - LABs 2566 LAB Operating Supply Current 90 mA
Operating Supply Voltage 1.5 V Product Type FPGA - Field Programmable Gate Array
Factory Pack Quantity 36 Subcategory Programmable Logic ICs
Total Memory 1944576 bit Tradename Stratix
Part # Aliases 971728

保証と返品

保証、返品、および追加情報

  • QAと返品ポリシー

    部品の品質保証: 365 日

    返品・返金：90日以内

    返品・交換：90日以内

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